TSMC Advanced Nodes Run at 100% as CoWoS Shortage Pushes Packaging Orders to OSATs

Late in the third quarter, TSMC's 3nm and 2nm processes and its CoWoS advanced packaging capacity all remained in short supply as large customers changed orders and front-end and back-end supply models shifted. Estimates put overall utilisation at about 96.2% at the end of September, with everything from 16/12nm down to 2nm at 100%, 45nm at 97%, and 8-inch fabs also close to full. The foundry continues converting some 5nm equipment to 3nm, with a new 3nm line at the Southern Taiwan Science Park expected to enter mass production in the first half of 2027, and both its second Arizona fab and second Japan fab planned to adopt 3nm. On the 2nm side, Baoshan Fab 20 and Kaohsiung Fab 22 are each due to reach 50,000 wafers per month by the end of October, about 100,000 combined, while southern Taiwan 3nm reaches roughly 185,000 wafers per month.

Allocation is the real story. Nvidia and Apple continue to dominate advanced process and packaging resources, with Nvidia having overtaken Apple as TSMC's largest 3nm customer in 2025. AWS has recently expanded AI chip tape-outs through Annapurna, lifting its priority in 3nm and CoWoS allocation, while MediaTek is handling Google TPU orders and competing for 2/3nm and CoWoS-S/L capacity. Supply chain sources say TSMC has recently readjusted capacity allocation because the next-generation TPU v9 will use both TSMC CoWoS-L and Intel EMIB-T, changing the front-end and back-end supply model and prompting a slight revision to MediaTek's 3nm and 2nm planning. At 2nm, AMD's Venice EPYC server CPU and MI455X GPU were the first adopters in July 2026, with the iPhone A20 Pro ramping alongside them.

The packaging bottleneck is where the constraint now shows up for customers. CoWoS shortage has driven spillover orders to OSAT providers in a queue led by SPIL under ASE, followed by Amkor and Powertech Technology. Although Powertech ranks lower in that queue, its packaging capacity is already fully utilised and its order visibility extends to 2028. Upstream, the wafer market is repricing at the same time: global silicon wafer shipments reached 3,740 million square inches in Q2 2026, up about 8.2% year on year, with 300mm utilisation recovered above 92% and 200mm at 88%. Shin-Etsu and SUMCO issued increase notices in May raising long-term 12-inch contract prices 10-15%, GlobalWafers and Chinese makers followed in June, and a further round of 12-inch contracts settled in late August at another 10% or more.