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TSMC Maps 22% 2nm and 16% 3nm Capacity Growth by Mid-2027 as CoWoS Tightness Persists

TSMC has outlined 2027 expansion targets for the first time, lifting 2nm to 110,000 wafers a month and 3nm to 210,000 by mid-2027, while CoWoS advanced packaging stays in short supply through the third quarter.

TSMC has for the first time set out 2027 expansion targets, with 2nm capacity set to grow 22% and 3nm more than 16% from end-2026 to mid-2027. In absolute terms, 2nm capacity is expected to rise from 90,000 wafers per month at the end of 2026 to 110,000 by mid-2027, while 3nm climbs from more than 180,000 to 210,000 wafers per month over the same period. The foundry is adding three 3nm fabs across Taiwan, Arizona and Japan while continuing to convert 5nm equipment in Taiwan to support additional 3nm capacity. At its July earnings call TSMC guided 2026 capital spending to a range of $60 billion to $64 billion, with about 70% to 80% allocated to advanced process technologies.

Advanced packaging is expanding just as aggressively. CoWoS capacity could double from roughly 130,000 wafers per month at end-2026 to 260,000 by end-2028, with the ramp expected to centre on AP7 in Taiwan and the Arizona campus where local packaging reduces the need to ship advanced chips back to Taiwan. Rivals are scaling too: analysts estimate Intel's EMIB-T capacity, measured in 12-inch CoWoS-equivalent wafers, could climb from 15,000 to 20,000 per month in 2027 to 40,000 to 45,000 in 2028. MediaTek has said Intel's EMIB packaging has reached a very good level, signalling improving yields and further progress on an alternative supply route.

Near-term supply remains tight despite the expansion plans. TSMC's 3nm, 2nm and CoWoS advanced packaging capacity stayed in short supply in the third quarter of 2026 as changes in major customer orders and front-end and back-end supply models prompted the foundry to adjust its advanced capacity allocation. Customer shifts involving AWS, MediaTek and the Google TPU programme are reshaping how leading-edge wafers and packaging slots are distributed. Packaging technology is also moving up the ladder, with glass substrates and through-glass vias set to reshape the 2027 advanced packaging race as AI chip package sizes continue to expand.

Sources