TSMC Reallocates 3nm and CoWoS Capacity as AWS and Google TPU Orders Reshape the Queue
TSMC's 3nm, 2nm and CoWoS advanced packaging capacity remain in short supply in late 3Q26, with AWS Annapurna taking more 3nm wafers and MediaTek's Google TPU programme forcing a revision of its allocation. Supply-chain sources say wafer-out prices will rise 3-6% from January 2027, with advanced nodes at the top of the range.
Supply-chain sources told DIGITIMES that TSMC is re-cutting its leading-edge allocation as hyperscaler custom silicon competes with incumbent customers. NVIDIA and Apple continue to hold the largest shares of 3nm and advanced packaging, but Amazon's Annapurna unit has expanded wafer starts and raised its 3nm priority, while MediaTek is bidding for 2nm and 3nm capacity plus CoWoS-S and CoWoS-L slots on top of its mobile business because of a large Google TPU order. After Google decided the next-generation TPU v9 will use both TSMC CoWoS-L and Intel EMIB-T, TSMC trimmed MediaTek's 3nm and 2nm allocations to reflect the changed front-end and back-end split.
Capacity is expanding but stays booked. TSMC's 2nm output is scheduled to reach about 100,000 wafers a month by the end of October 2026 split between Fab 20 in Hsinchu and Fab 22 in Kaohsiung, while 3nm at Tainan is heading for roughly 185,000 wafers a month. Overall utilisation was reported at 96.2% with every node from 16nm down to 2nm running at 100%, and CoWoS shortages are pushing overflow packaging to Siliconware first and then to Amkor and Chipbond, with visibility now extending into 2028.
Pricing follows the tightness. Supply-chain sources say TSMC has settled on adjusting wafer-out prices from January 2027 by about 3% to 6%, with 2nm and 3nm at the higher end and mature and specialty processes negotiated case by case against product, utilisation and customer. Order visibility is reported to run to 2030, and because Samsung Foundry and Intel Foundry both lack comparable leading-edge capacity at scale, customers have limited ability to switch suppliers in response.
Competitors are trying to close the gap. Samsung Electronics' foundry unit is reported to have raised yield on its 2nm SF2 process to nearly 60% and has shifted engineering effort toward power efficiency and other maturity checks in a bid to win larger customers, while its overall foundry recovery is still constrained by 2nm yields and the pace of the Taylor fab ramp in Texas.